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CPU-Wafer1

At the GlobalFoundries Engineering Conference this week, AMD's CTO, Mark Papermaster, appear his firm would use GlobalFoundries' new 12nm LP procedure node for upcoming products. GlobalFoundries said 12nm LP would begin production in 2018 and ramp up to volume fairly quickly.

The reason the company can do that, almost without question, is 12nm isn't an actual process node by the one-time definition at all. It's the kind of iterative improvement that foundries used to roll out as a half-node, or referred to equally a new type of adequacy on the same process node.

TSMC had multiple flavors of 28nm, if you recall, each with its own density metrics and performance characteristics. As node shrinks go more difficult and take longer, foundries take risen to the challenge by creating a blizzard of PR and marketing terms to newspaper over the fact that they can't evangelize the operation improvements they used to. Information technology's hilarious, in a style, watching anybody bend over backwards to claim rigorous amounts of improvement when the bodily results they can send are less impressive relative to their predecessors every single yr.

AMD will deploy 12nm LP for both Zen CPUs and Vega GPUs in 2018, presumably including the Zen+ CPU that previously appeared on its roadmap. Role of the reason we know that GF'south 12nm LP is a small aligning to existing processes is that the visitor has been quite articulate nigh its roadmap. GF has already said that it won't deploy a 10nm solution, preferring instead to leapfrog for 7nm. Whether this 12nm procedure is a 14nm node with a few 7nm-class tweaks or just an improved 14nm ultimately doesn't matter; the xv percent density and x per centum functioning improvements that GlobalFoundries is challenge is right in line with similar claims by TSMC and Samsung for their improvements.

Foundry roadmaps are the closest thing the industry has to beingness set up in stone, because deploying new nodes costs huge amounts of coin. The nodes themselves take a substantial corporeality of fourth dimension to build and consummate, particularly when equipment changes are needed, and we already know that GF's 7nm lines will be designed for EUV integration when available. Whether this is a purely marketing-driven maneuver or a necessary stopgap due to 7nm problems isn't clear. Simply anyone expecting annihilation merely the most modest of performance or power improvements is probably overselling the boost.

That's not to say AMD won't become whatsoever utility out of the new node — Vega could utilise a power consumption drib, while a few hundred MHz of boosted CPU performance would give Ryzen a flake of a kick in lightly threaded or single-threaded scenarios, where it tends to be weakest against Intel. Just absent any glaring chip design bug that accept limited clocks or prevented lower power consumption, we tin can't reasonably expect a 10 to 15 per centum improvement in either metric to reinvent the bike.